搜索资源列表
des-verilog
- des加密算法的verilog语言的实现-des encryption algorithm to achieve the Verilog language
AES DES verilog代码
- AES DES verilog代码
DES.rar
- DES算法的verilog实现，实现了硬件IC对DES的构架，可以直接应用在系统当中。,DES algorithm Verilog realized, the realization of the hardware IC framework of DES, can be directly used in the system.
rom_des
- DES 加密算法的VHDL和VERILOG 源程序及其TESTBENCH。-VHDL and VERILOG sourcecode and TESTBENCH of DES encrypting algorithm
DES_Verilog
- 这是我用Verilog写的DES加解密程序,准确的说这是一份实验报告,里面不但有程序还有简单的注释[主要是针对仿真的波形的],我主要写的是主控部分,密钥生成部分参考了下版原康宏的程序.该程序即可加密也可解密,选用CycloneII器件即能跑到100Mhz以上.-This is what I used to write Verilog the DES encryption and decryption procedures, accurate to say that this is a test
LIP1601CORE_des_3des
- DES & 3DES VHDL & Verilog code
DES
- DES加密算法的VHDL实现,采用流水线技术实现-The VHDL implement of DES encrypt algorithmic
tripledes
- 3-DES加密IP核VHDL源码，3次DES流水执行-VHDL source code for 3-DES encryption IP core, pipelined execution
des_Vhdl
- VHDL & Verilog Synthesizable model of the Data Encryption Standard (DES)
DES
- This is verilog source code for DES(Data Encryption standard) which is used in network security.
aes_thesis_v1.0
- AES VERILOG CODE 128 192 32DES比較-AES VERILOG CODE 128 192 32DES Comparison
DES
- 在ISE平台上，利用Verilog编程实现数据的DES加密-In the ISE platform, using Verilog programming DES data encryption
DES_Encrypt_Decrypt_Verilog
- DES加密算法的Verilog HDL实现，带模式选择端口，可以实现加密和解密，已经modelsim仿真通过。-Des En/Decrypt,Verilog HDL code
topic
- DES加密算法的VHDL和VERILOG源程序- Xilinx开源共享61EDA代码工厂-DES encryption algorithm of VHDL and VERILOG source code- Xilinx factory open source code sharing 61EDA
des
- des解密加密的verilog源代码其中包含有测试源代码，仿真结果图-verilog des decrypt encrypted source code which includes testing the source code, Simulation results
LIP1602CORE_des
- Verilog DES Encrption Module
des
- des的Verilog代码（已编译，可直接使用）-des Verilog code (compiled, and can be used directly)
DES-Verilog-master
- DES加密算法硬件verilog实现，包含testbench，加密主模块encrypt，明文变换模块LRToCiphertextConverter，NextRi模块等子模块。-DES encrypt verilog
21ic下载_快速DES算法
- des代码,using verilog HDL,方便I使用(des code, using by verilog HDL.)
des
- DES in verilog codes